The present invention relates to floating-point processing and, more particularly, floating-point processing with multiple precisions. A major objective of the present invention is to provide higher performance in an economical floating-point processor.
Floating-point processors are specialized computing units that perform certain arithmetic operations, e.g., multiplication, division, trigonometric functions, and exponential functions, at high speeds. Accordingly, high-power computing systems often incorporate floating-point processors, either as part of a main processor or as a coprocessor.
"Floating-point" describes a class of formats for expressing numbers. A typical floating-point format describes a number by identifying its sign, its exponent and its mantissa. For example, 100/3 equals 33.3. This number can be approximated in floating-point format as (+)(10.sup.2)(0.333). However, it can be more precisely expressed as (+)(10.sup.2)(0.333333). To calculate (100/3).sup.2 =1111.1=(+)(10.sup.4)(0.1) using the lower precision floating-point format, one would get (+)(10.sup.4)(0.110889). Only the first three digits are considered significant, so the result would be rounded and expressed as (+)(10.sup.4)(0.111). Using the higher precision format, one would get (+)(10.sup.4)(0.111110888889). Rounding this to six significant figures results in (+)(10.sup.4)(0.111111). Note that the latter answer is more accurate, but requires more time to calculate.
Floating-point processors express numbers in binary form (with strings of 1s and 0s) instead of decimal form. Three precisions, taken from the ANSI/IEEE standard 754-1985, are commonly employed: "single" 32-bit precision provides for a 1-bit sign, an 8-bit exponent, and a 24-bit mantissa; "double" 64-bit precision provides for a 1-bit sign, an 11-bit exponent, and a 53-bit mantissa; and "extended double" or "extended" 80-bit precision provides for a 1-bit sign, a 15-bit exponent, and a 64-bit mantissa. In the case of IEEE single and double precision, the most significant mantissa bit is not stored in the encoding, but is implied to be "0" or "1" based on the exponent.
A processor that executes floating-point operations with all three precisions is disclosed in U.S. Pat. No. 5,481,686 to Kenneth A. Dockser. An important innovation in that patent is the detection of apparent precision to reduce the execution precision required in some cases to improve throughput. For example, an extended precision value can be treated as a double precision value where there are a sufficient number of trailing zeroes in the mantissa. When two extended-precision values with apparent double precision are to be multiplied, the multiplication can be performed at double precision when the requested result precision is double.
In most applications, the greater precisions are used more rarely than the lesser precisions. Extended precision, in particular, is encountered at most infrequently in many computational environments. Accordingly, the larger registers and more complex execution units required to implement extended precision in a floating-point processor can be dispensed with in favor of lower costs or alternative functionality.
When a processor without extended precision capability encounters an instruction calling for such capability, a trap can be executed to call a subroutine that implements the extended precision operation. For example, instructions to load extended precision values are trapped; the called routine stores the values or pointers to the values in memory rather than in registers of the floating-point processor. When an instruction to execute an extended precision operation is received, a trap is executed that calls a suitable extended precision software routine. The extended precision software routine accesses extended precision values formerly stored in memory and performs the requested operation.
While justifiable from a cost or functionality perspective, this software execution is much slower than the alternative hardware. What is needed is a system that substantially achieves the savings of a floating-point processor without extended precision capability but provides higher performance.